New X-Ray pixel detectors are required to cope with the demanding requirements from XFEL (Xray Free Electron Laser) sources, in terms of high-speed and high dynamic range. Detectors have to provide also low electronics noise to allow single photon detection. In this work, we explore the feasibility of an alternative front-end (FE) based on a Charge Sensitive Amplifier (CSA) with Active Gain switching (AGC), and on a Flip-Capacitor Filter in a closed-loop configuration. The CSA can achieve either a single photon resolution and a high dynamic range by employing different feedback capacitances, configurable using a ”predictive” AGC circuit. The predictive AGC circuit dynamically sets the proper gain by measuring the time needed for the signal to exceed a fixed threshold. The FE performs a fast trapezoidal filtering of the output CSA signal with an architecture based on a Flip-Capacitor Filter. We expect to present at the conference the final FE design and relevant simulations, considering a first prototype realized in 65nm CMOS technology. The first version is optimized for low-noise readout of X-ray photons at 1 keV, but it can be adapted for the use with higher energies (>10 keV).

Front-end Study for future European XFEL detectors

Porro, M.;
2024-01-01

Abstract

New X-Ray pixel detectors are required to cope with the demanding requirements from XFEL (Xray Free Electron Laser) sources, in terms of high-speed and high dynamic range. Detectors have to provide also low electronics noise to allow single photon detection. In this work, we explore the feasibility of an alternative front-end (FE) based on a Charge Sensitive Amplifier (CSA) with Active Gain switching (AGC), and on a Flip-Capacitor Filter in a closed-loop configuration. The CSA can achieve either a single photon resolution and a high dynamic range by employing different feedback capacitances, configurable using a ”predictive” AGC circuit. The predictive AGC circuit dynamically sets the proper gain by measuring the time needed for the signal to exceed a fixed threshold. The FE performs a fast trapezoidal filtering of the output CSA signal with an architecture based on a Flip-Capacitor Filter. We expect to present at the conference the final FE design and relevant simulations, considering a first prototype realized in 65nm CMOS technology. The first version is optimized for low-noise readout of X-ray photons at 1 keV, but it can be adapted for the use with higher energies (>10 keV).
2024
2024 IEEE Nuclear Science Symposium (NSS), Medical Imaging Conference (MIC) and Room Temperature Semiconductor Detector Conference (RTSD)
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/10278/5106694
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