Modeling and Optimization of 1.2 kV SiC-Based Pre-package Power Module in Half-Bridge Arrangement Using Finite Element Analysis

The wide band gap (WBG) power devices, silicon carbide (SiC) and gallium nitride (GaN), have emerged as a promising alternative to the traditional silicon (Si) based devices. This is primarily due to Si's theoretical limits regarding high voltage endurance and high-frequency operation [1, 2]. To optimize the performance of WBG semiconductors, it is crucial to develop new packaging technologies and thermal-electric designs that facilitate efficient and rapid device switching while minimizing energy losses. This study delves into the thermal, electrical, and mechanical behavior of new prepackage embedding technologies using finite element simulation, aiming to create a digital twin block. The research explores insulated substrates, including direct bonded copper (DBC) with various dielectrics such as AlN, Al2O3, and Si3N4, as well as insulated metal substrates (IMS), with a focus on commercially available materials and thicknesses. A thermo-mechanical Pareto-optimization methodology is proposed to identify the optimal substrate configuration. The sintered silver layer, prone to delamination, is modeled using a temperature-dependent bi-linear hardening model to account for plasticity and creep. The results highlight that the DBC with AlN substrate configuration offers the best thermal and mechanical performance, with a thermal resistance of 0.34 K/W and an accumulative plastic strain of 0.18%. Moreover, the study assesses the parasitic inductance of multiple prepackages to scale the module's power. Effective design implementation can reduce the stray inductance to as low as 1.23 nH for two prepackages and 2.85 nH for four prepackages, demonstrating the practical implications of this research in improving the efficiency and performance of power modules.