The European X-ray Free Electron Laser (EuXFEL) is a light source of the 4th generation which provides spatially coherent ultrashort X-ray pulses at high rate. The facility enabled unprecedented advancement in fundamental research, but also needed new detectors to fit the EuXFEL requirements, such as single photon resolution, large dynamic range, and high repetition rate: three 2D megapixel detectors have been developed to cope with the demanding environment. The DEPleted Field Effect Transistors (DEPFET) Sensor with Signal Compression (DSSC) detector is one of them. The parallel readout from each pixel is performed employing a dedicated Application Specific Integrated Circuit (ASIC). The generated data flow is read through a 2-stage Field Programmable Gate Array (FPGA)-based Data AcQuisition (DAQ) chain: the Input Output Board (IOB) controls the primary readout from 16 ASICs and serializes data on high-speed links that are sent to the Patch Panel Transceiver (PPT). It is also responsible for the clock distribution and timing control of the front-end and switched power channels. The PPT reorders and forwards the received data toward the EuXFEL back-end, and allows remote control over the whole DAQ. A first DSSC camera, based on miniaturized silicon drift detectors (mini-SDD) has been available for users' experiments since 2019, and a second DEPFET-based camera is under construction. The IOB firmware has been thoroughly reviewed and modified to cope with the new DEPFET sensors' physics and to improve the performance of both the mini-SDD and DEPFET versions. We present an overview of the DSSC, focusing on the DAQ, highlighting the main properties of the environment where the detector operates. We assess the firmware improvements introduced, with a particular focus on the IOB, and present the results obtained in comparison to the original firmware.
A Study of the Latest Updates of the DAQ Firmware for the DSSC Camera at the European XFEL
Porro, M;
2023-01-01
Abstract
The European X-ray Free Electron Laser (EuXFEL) is a light source of the 4th generation which provides spatially coherent ultrashort X-ray pulses at high rate. The facility enabled unprecedented advancement in fundamental research, but also needed new detectors to fit the EuXFEL requirements, such as single photon resolution, large dynamic range, and high repetition rate: three 2D megapixel detectors have been developed to cope with the demanding environment. The DEPleted Field Effect Transistors (DEPFET) Sensor with Signal Compression (DSSC) detector is one of them. The parallel readout from each pixel is performed employing a dedicated Application Specific Integrated Circuit (ASIC). The generated data flow is read through a 2-stage Field Programmable Gate Array (FPGA)-based Data AcQuisition (DAQ) chain: the Input Output Board (IOB) controls the primary readout from 16 ASICs and serializes data on high-speed links that are sent to the Patch Panel Transceiver (PPT). It is also responsible for the clock distribution and timing control of the front-end and switched power channels. The PPT reorders and forwards the received data toward the EuXFEL back-end, and allows remote control over the whole DAQ. A first DSSC camera, based on miniaturized silicon drift detectors (mini-SDD) has been available for users' experiments since 2019, and a second DEPFET-based camera is under construction. The IOB firmware has been thoroughly reviewed and modified to cope with the new DEPFET sensors' physics and to improve the performance of both the mini-SDD and DEPFET versions. We present an overview of the DSSC, focusing on the DAQ, highlighting the main properties of the environment where the detector operates. We assess the firmware improvements introduced, with a particular focus on the IOB, and present the results obtained in comparison to the original firmware.
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