DEPFET pixel detectors are unique devices in terms of energy and spatial resolution because very low noise (ENC = 2.2e at room temperature) operation can be obtained by implementing the amplifying transistor in the pixel cell itself. Full DEPFET pixel matrices have been built and operated for autoradiographical imaging with imaging resolutions of 4.3 /spl plusmn/ 0.7 lp/mm at 22 keV. For applications in low energy X-ray astronomy the high energy resolution of DEPFET detectors is attractive. For particle physics, DEPFET pixels are interesting as low material detectors with high spatial resolution. For a Linear Collider detector the readout must be very fast. New readout chips have been designed and produced for the development of a DEPFET module for a pixel detector at the proposed TESLA collider (520 /spl times/ 4000 pixels) with 50 MHz line rate and 25 kHz frame rate. The circuitry contains current memory cells and current hit scanners for fast pedestal subtraction and sparsified readout. The imaging performance of DEPFET devices as well as present achievements towards a DEPFET vertex detector for a Linear Collider are presented.
New results on DEPFET pixel detectors for radiation imaging and high energy particle detection
Porro M.;
2003-01-01
Abstract
DEPFET pixel detectors are unique devices in terms of energy and spatial resolution because very low noise (ENC = 2.2e at room temperature) operation can be obtained by implementing the amplifying transistor in the pixel cell itself. Full DEPFET pixel matrices have been built and operated for autoradiographical imaging with imaging resolutions of 4.3 /spl plusmn/ 0.7 lp/mm at 22 keV. For applications in low energy X-ray astronomy the high energy resolution of DEPFET detectors is attractive. For particle physics, DEPFET pixels are interesting as low material detectors with high spatial resolution. For a Linear Collider detector the readout must be very fast. New readout chips have been designed and produced for the development of a DEPFET module for a pixel detector at the proposed TESLA collider (520 /spl times/ 4000 pixels) with 50 MHz line rate and 25 kHz frame rate. The circuitry contains current memory cells and current hit scanners for fast pedestal subtraction and sparsified readout. The imaging performance of DEPFET devices as well as present achievements towards a DEPFET vertex detector for a Linear Collider are presented.I documenti in ARCA sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.