The DSSC (DEPFET Sensor with Signal Compression) consortium develops a IMPixel detector for low energy X-rays at the European XFEL. The XFEL will produce 10 bursts per second, each containing 2880 X-ray pulses with a repetition rate of 4.5 MHz. X-ray photons of 0.5 - 6 keV are absorbed in hexagonal DEPFET pixels of 229 × 204 μm 2 pitch with a nonlinear characteristic to achieve a high dynamic range. The sensors will be bump bonded to readout ASICs of 64 × 64 pixels. Each pixel contains a filter with trapezoidal weighting function, a single slope ADC of 8-9 Bit resolution and a digital memory to store 640 events. A veto mechanism allows to discard uninteresting events. The digital hit data is read out serially during the ≈100 ms long burst gaps. Prototype matrix chips of 8 × 8 pixels with the full functionality have been produced and characterized electronically and with DEPFET sensors. The architecture and the design of the 8 × 8 ASIC, measured results and an outlook to the large 64 × 64 pixel chip will be presented.

The DSSC pixel readout ASIC with amplitude digitization and local storage for DEPFET sensor matrices at the European XFEL

Porro M.;
2012-01-01

Abstract

The DSSC (DEPFET Sensor with Signal Compression) consortium develops a IMPixel detector for low energy X-rays at the European XFEL. The XFEL will produce 10 bursts per second, each containing 2880 X-ray pulses with a repetition rate of 4.5 MHz. X-ray photons of 0.5 - 6 keV are absorbed in hexagonal DEPFET pixels of 229 × 204 μm 2 pitch with a nonlinear characteristic to achieve a high dynamic range. The sensors will be bump bonded to readout ASICs of 64 × 64 pixels. Each pixel contains a filter with trapezoidal weighting function, a single slope ADC of 8-9 Bit resolution and a digital memory to store 640 events. A veto mechanism allows to discard uninteresting events. The digital hit data is read out serially during the ≈100 ms long burst gaps. Prototype matrix chips of 8 × 8 pixels with the full functionality have been produced and characterized electronically and with DEPFET sensors. The architecture and the design of the 8 × 8 ASIC, measured results and an outlook to the large 64 × 64 pixel chip will be presented.
2012 IEEE Nuclear Science Symposium and Medical Imaging Conference Record (NSS/MIC)
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/10278/5008775
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