VERITAS 2.0 is a multi-channel readout ASIC for pnCCDs and DEPFET arrays. The main chip application is the readout of the DEPFET pixel arrays of the Wide Field Imager for the Athena mission. Every readout channel implements a trapezoidal weighting function and it is based on a fully differential architecture. VERITAS 2.0 is the first ASIC able to readout the DEPFETs both in source follower mode and in drain current mode. The drain readout should make it possible to achieve a processing time of about 2-3 mu s/line with an electronics noise <= 5 electrons r.m.s.. The main concept and first measurements are presented.
VERITAS 2.0 a multi-channel readout ASIC suitable for the DEPFET arrays of the WFI for Athena
Porro, M
;
2014-01-01
Abstract
VERITAS 2.0 is a multi-channel readout ASIC for pnCCDs and DEPFET arrays. The main chip application is the readout of the DEPFET pixel arrays of the Wide Field Imager for the Athena mission. Every readout channel implements a trapezoidal weighting function and it is based on a fully differential architecture. VERITAS 2.0 is the first ASIC able to readout the DEPFETs both in source follower mode and in drain current mode. The drain readout should make it possible to achieve a processing time of about 2-3 mu s/line with an electronics noise <= 5 electrons r.m.s.. The main concept and first measurements are presented.
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