DEPFET pixel detectors are unique devices in terms of energy and spatial resolution because very low noise operation can be obtained (ENC = 2.2e - at room temperature) by implementing the amplifying transistor in the pixel cell itself. Full DEPFET pixel matrices have been built and operated for autoradiographical imaging with imaging resolutions of 4.3 ± 0.8 μm at 22 keV. For applications in low energy X-ray astronomy the high energy resolution of DEPFET detectors is attractive. For particle physics, DEPFET pixels are interesting as low mass detectors with high spatial resolution. For a linear collider detector the readout must be very fast. New readout chips have been designed and produced for the development of a DEPFET module for a pixel detector at the proposed TESLA collider, containing 520 × 4000 pixels, with 50 MHz line rate and 25 kHz frame rate. The circuitry contains current memory cells and current hit scanners for fast pedestal subtraction and sparsified readout. The imaging performance of DEPFET devices as well as present achievements toward a DEPFET vertex detector for a linear collider are presented.

New results on DEPFET pixel detectors for radiation imaging and high energy particle detection

Porro M.;
2004-01-01

Abstract

DEPFET pixel detectors are unique devices in terms of energy and spatial resolution because very low noise operation can be obtained (ENC = 2.2e - at room temperature) by implementing the amplifying transistor in the pixel cell itself. Full DEPFET pixel matrices have been built and operated for autoradiographical imaging with imaging resolutions of 4.3 ± 0.8 μm at 22 keV. For applications in low energy X-ray astronomy the high energy resolution of DEPFET detectors is attractive. For particle physics, DEPFET pixels are interesting as low mass detectors with high spatial resolution. For a linear collider detector the readout must be very fast. New readout chips have been designed and produced for the development of a DEPFET module for a pixel detector at the proposed TESLA collider, containing 520 × 4000 pixels, with 50 MHz line rate and 25 kHz frame rate. The circuitry contains current memory cells and current hit scanners for fast pedestal subtraction and sparsified readout. The imaging performance of DEPFET devices as well as present achievements toward a DEPFET vertex detector for a linear collider are presented.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/10278/3755710
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