An open-loop front-end stage with signal compression capability and improved PSRR for mini-SDD pixel detectors

In this work we present the design and the experimental characterization of a front-end stage for X-ray pixel sensors. Our study was carried out in the framework of the DSSC detector development for the European XFEL (X-ray Free Electron Laser). The DSSC detector is going to be used in photon science applications at the European XFEL GmbH in Hamburg, Germany, and must be able to cope with an image frame rate up to 4.5 MHz. Moreover, the single photon sensitivity and a dynamic range up to 104 photons/pixel/pulse, with a photon energy of 1 keV, is required at the same time. Therefore, to achieve these requirement the front-end must provide a non-linear amplification. The non-linear response is obtained with a simple circuit that pushes the input PMOSFET into triode region as the input signal increases. However, since the readout ASIC has more than 4000 channels operating in parallel, particular care was devoted to the robustness of the implemented solution, especially with respect to power supply rejection ratio and crosstalk among channels.